Regviz

NXP Semiconductors /MIMXRT1011 /TEMPMON /TEMPSENSE2_CLR

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as TEMPSENSE2_CLR

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/NXP Semiconductors/MIMXRT1011/TEMPMON/TEMPSENSE2_CLR#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0LOW_ALARM_VALUE0PANIC_ALARM_VALUE

Description

Tempsensor Control Register 2

Fields

LOW_ALARM_VALUE

This bit field contains the temperature count that will generate a low alarm interrupt when the field is exceeded by TEMP_CNT
PANIC_ALARM_VALUE

This bit field contains the temperature count that will generate a panic interrupt when TEMP_CNT is smaller than this field

Links

()

Register License

Copyright 2016-2019 NXP All rights reserved.

SPDX-License-Identifier: BSD-3-Clause

 ()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data